Login / Signup
Using a reconfigurable field programmable gate array to demonstrate boundary scan with built in self test.
Hardy J. Pottinger
Chien-Yuh Lin
Published in:
Great Lakes Symposium on VLSI (1995)
Keyphrases
</>
field programmable gate array
hardware implementation
artificial intelligence
low cost
computing systems
computer vision
image processing
case study
data streams
pairwise
probabilistic model
object oriented
signal processing
embedded systems
parallel computing