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Robustness enhancement through chip-package co-design for high-speed electronics.
Meigen Shen
Jian Liu
Li-Rong Zheng
Esa Tjukanoff
Hannu Tenhunen
Published in:
Microelectron. J. (2005)
Keyphrases
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high speed
low power
real time
frame rate
image enhancement
high speed networks
high robustness
computational efficiency
software package
neural network
genetic algorithm
information systems
low cost
single chip
focal plane