A low-power accuracy-configurable floating point multiplier.
Hang ZhangWei ZhangJohn C. LachPublished in: ICCD (2014)
Keyphrases
- floating point
- low power
- power consumption
- low cost
- high speed
- single chip
- fixed point
- vlsi circuits
- sparse matrices
- wireless transmission
- low power consumption
- high power
- cmos technology
- vlsi architecture
- instruction set
- digital signal processing
- hardware and software
- logic circuits
- image processing
- delay insensitive
- image sensor
- signal processor
- floating point arithmetic