A high-speed CMOS op-amp design technique using negative Miller capacitance.

Boaz Shem-Tov Mücahit Kozak Eby G. Friedman

Published in: ICECS (2004)

Keyphrases

high speed
low power
real time
positive and negative
circuit design
low cost
data sets
high speed networks
digital signal processing
single chip
design space
website
power consumption
design process
engineering design
building blocks
case study
information systems
learning algorithm