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A 7.6-12.3 GHz wide-band PLL with an ultra low reference spur -81.1 dBc in 0.13 μm CMOS technology.
Jinwei Li
Bing Sun
Jiawei Huang
Hudong Chang
Rui Jia
Honggang Liu
Published in:
Int. J. Circuit Theory Appl. (2023)
Keyphrases
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wide band
cmos technology
high speed
low power
power consumption
low voltage
low light
slowly varying
frame rate
clock frequency
power dissipation
wavelet transform
received signal