Design of a Two-Step Low-Power and High-Speed CMOS Flash ADC Architecture.
Sumit KumarNagesh ChPublished in: VDAT (2020)
Keyphrases
- low power
- high speed
- vlsi architecture
- single chip
- analog to digital converter
- cmos technology
- power consumption
- nm technology
- mixed signal
- low cost
- low power consumption
- cmos image sensor
- gate array
- logic circuits
- ultra low power
- vlsi circuits
- digital signal processing
- power dissipation
- high power
- power reduction
- signal processor
- real time
- low voltage
- image sensor
- power saving
- wireless transmission
- design considerations
- frame rate
- parallel processing
- wireless sensor networks