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Low-Power Spectral-Line Clock Recovery Algorithm for SDR Applications.
Ali Montazeri
Allen Webb
Kamran Kiasaleh
Published in:
IEEE Trans. Circuits Syst. II Express Briefs (2011)
Keyphrases
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low power
recovery algorithm
power consumption
high speed
low cost
single chip
logic circuits
digital signal processing
image sensor
vlsi architecture
low power consumption
frame rate
power reduction
real time
vlsi circuits
mixed signal
power dissipation
computer systems
video sequences