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Hardware-Efficient Logarithmic Floating-Point Multipliers for Error-Tolerant Applications.
Zijing Niu
Tingting Zhang
Honglan Jiang
Bruce F. Cockburn
Leibo Liu
Jie Han
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2024)
Keyphrases
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error tolerant
floating point
floating point arithmetic
instruction set
sparse matrices
graph matching
fixed point
computer vision
image processing
bayesian networks
pairwise
computer architecture
floating point unit