High performance pipelined FPGA implementation of the SHA-3 hash algorithm.
Lenos IoannouHarris E. MichailArtemios G. VoyiatzisPublished in: MECO (2015)
Keyphrases
- fpga implementation
- learning algorithm
- detection algorithm
- hardware implementation
- computational complexity
- simulated annealing
- dynamic programming
- np hard
- real time
- k means
- preprocessing
- image processing
- artificial intelligence
- image analysis
- expectation maximization
- pattern recognition
- tree structure
- case study
- image processing algorithms