Low power active load and IMOS varactor based VCO designs using differential delay stages in 0.18 μm technology.
Vivek JangraManoj KumarPublished in: Microelectron. J. (2020)
Keyphrases
- low power
- nm technology
- power consumption
- power dissipation
- cmos technology
- low cost
- high speed
- gate array
- wireless transmission
- power reduction
- single chip
- low voltage
- high power
- logic circuits
- image sensor
- vlsi circuits
- vlsi architecture
- mixed signal
- digital signal processing
- wireless communication
- delay insensitive
- signal processor
- parallel processing
- image processing