SAT Based Predicate Abstraction for Hardware Verification.
Edmund M. ClarkeMuralidhar TalupurHelmut VeithDong WangPublished in: SAT (2003)
Keyphrases
- bounded model checking
- hardware designs
- model checking
- formal verification
- low cost
- hardware and software
- linear temporal logic
- temporal logic
- multi agent systems
- real time
- personal computer
- vlsi implementation
- image processing
- hardware implementation
- answer set programming
- hardware architecture
- computing systems
- first order logic
- computer systems
- sat solvers
- embedded systems
- massively parallel
- ai planning
- computing power
- data acquisition
- verification method
- orders of magnitude