A fast algorithm for minimizing FPGA combinational and sequential modules.

Dimitrios Kagaris Spyros Tragoudas

Published in: ACM Trans. Design Autom. Electr. Syst. (1996)

Keyphrases

hardware implementation
sequential search
real time
low cost
real time image processing
high speed
signal processing
field programmable gate array
database
knowledge structures
case study
building blocks
data acquisition
feature selection
hardware design
functional modules
modular architecture
gate array