A 30mW 12b 40MS/s subranging ADC with a high-gain offset-canceling positive-feedback amplifier in 90nm digital CMOS.
Yasuhide ShimizuShigemitsu MurayamaKohhei KudohHiroaki YatsudaAkihide OgawaPublished in: ISSCC (2006)
Keyphrases
- positive feedback
- wide dynamic range
- dynamic range
- power consumption
- analog to digital converter
- low power
- metal oxide semiconductor
- power supply
- hd video
- high sensitivity
- circuit design
- high speed
- cmos image sensor
- nm technology
- cmos technology
- single chip
- mixed signal
- information retrieval
- image sensor
- low cost
- negative feedback
- integrated circuit
- statistically significant
- cooperative