A reconfigurable systolic primitive processor for signal processing.
Thanos StouraitisS. NatarajanFred J. TaylorPublished in: ICASSP (1985)
Keyphrases
- systolic array
- signal processing
- reconfigurable architecture
- parallel architecture
- hardware implementation
- data flow
- pattern recognition
- image processing
- fourier transform
- digital signal
- digital signal processing
- computer vision
- filter bank
- general purpose
- signal analysis
- high level
- parallel processing
- memory management
- multiscale
- high speed
- field programmable gate array
- low cost
- functional units
- neural network