Low area and high throughput implementation of advanced encryption standard hardware accelerator on FPGA using Mux-Demux pair.
N. RenugadeviStheya JulakantiSai Charan VemulaSomya BhatnagarShirisha ThangallapallyPublished in: Secur. Priv. (2023)
Keyphrases
- high throughput
- advanced encryption standard
- field programmable gate array
- hardware implementation
- hardware architecture
- data acquisition
- microarray
- fpga technology
- genome wide
- biological data
- low latency
- low cost
- systems biology
- xilinx virtex
- reconfigurable hardware
- encryption algorithms
- parallel computing
- cryptographic algorithms
- s box
- mass spectrometry data
- digital signal processing
- high speed
- embedded systems
- real time
- image processing algorithms
- signal processing
- mass spectrometry
- proteomic data
- efficient implementation
- data processing
- gene expression
- protein protein interactions
- monitoring system
- automated image analysis
- private key
- secret key
- data management
- image processing
- metadata
- databases