Cost-Effective and Variable-Channel FastICA Hardware Architecture and Implementation for EEG Signal Processing.
Lan-Da VanPo-Yen HuangTsung-Che LuPublished in: J. Signal Process. Syst. (2016)
Keyphrases
- cost effective
- hardware architecture
- signal processing
- hardware implementation
- low cost
- hardware architectures
- cost effectiveness
- field programmable gate array
- image processing
- pattern recognition
- brain computer interface
- single channel
- fourier transform
- independent component analysis
- signal acquisition
- processing elements
- eeg signals
- computer vision
- associative memory
- information systems
- xilinx virtex
- real time
- image processing algorithms
- parallel architecture
- multi channel
- case study