An Algorithm to Compact a VLSI Symbolic Layout with Mixed Constraints.
Yuh-Zen LiaoChak-Kuen WongPublished in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (1983)
Keyphrases
- dynamic programming
- learning algorithm
- multiple constraints
- optimal solution
- times faster
- preprocessing
- k means
- detection algorithm
- np hard
- similarity measure
- computational cost
- real valued time series
- constrained optimization
- cost function
- computational complexity
- neural network
- experimental evaluation
- worst case
- high accuracy
- high speed
- simulated annealing
- input data
- expectation maximization
- computationally efficient
- optimization algorithm
- feature selection
- data sets