Enhanced Interpolated-DFT for Synchrophasor Estimation in FPGAs: Theory, Implementation, and Validation of a PMU Prototype.
Paolo RomanoMario PaolonePublished in: IEEE Trans. Instrum. Meas. (2014)
Keyphrases
- theoretical basis
- hardware implementation
- frequency domain
- theoretical framework
- efficient implementation
- image processing
- field programmable gate array
- computational model
- fourier transform
- fpga implementation
- hardware design
- estimation accuracy
- estimation algorithm
- real time
- low cost
- multiresolution
- multi agent systems
- neural network