Hardware Implementation on FPGA for Task-Level Parallel Dataflow Execution Engine.
Chao WangJunneng ZhangXi LiAili WangXuehai ZhouPublished in: IEEE Trans. Parallel Distributed Syst. (2016)
Keyphrases
- hardware implementation
- field programmable gate array
- pipelined architecture
- parallel architecture
- execution engine
- parallel computing
- hardware design
- software implementation
- efficient implementation
- processing elements
- signal processing
- fpga implementation
- dedicated hardware
- hardware architecture
- image processing algorithms
- fpga technology
- fpga device
- massively parallel
- shared memory
- parallel computation
- web services
- parallel processing
- xilinx virtex
- general purpose