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A Low-Latency Algorithm and FPGA Design for the Min-Search of LDPC Decoders.
Georgios Tzimpragos
Christoforos Kachris
Dimitrios Soudris
Ioannis Tomkos
Published in:
IPDPS Workshops (2014)
Keyphrases
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search space
hardware implementation
search strategy
computational complexity
highly efficient
optimal solution
search algorithm
low latency
hardware architecture
real time
multi dimensional
orders of magnitude
classification algorithm
high throughput