A Low Power 10-Bit Time-to-Digital Converter Utilizing Vernier Delay Lines.
Wei ChenChristos PapavassiliouPublished in: UKSim (2013)
Keyphrases
- low power
- analog to digital converter
- mixed signal
- high speed
- low cost
- power consumption
- vlsi circuits
- power dissipation
- image sensor
- single chip
- high power
- multi channel
- logic circuits
- wireless transmission
- low power consumption
- vlsi architecture
- cmos image sensor
- cmos technology
- data conversion
- low voltage
- gate array
- long range
- ultra low power
- delay insensitive
- transfer function
- parallel processing
- phase locked loop