Low-power heterogeneous computing via adaptive execution of dataflow actors.

Jani Boutellier Shuvra S. Bhattacharyya

Published in: SiPS (2017)

Keyphrases

low power
heterogeneous computing
power consumption
low cost
high speed
vlsi circuits
data flow
single chip
parallel computing
vlsi architecture
low power consumption
compute intensive
digital signal processing
real time
power reduction
image sensor
grid computing
power dissipation
data mining