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A 0.18-µm CMOS 10-Gb/s Dual-Mode 10-PAM Serial Link Transceiver.
Bongsub Song
Kyunghoon Kim
Junan Lee
Jinwook Burm
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2013)
Keyphrases
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high speed
ultra low power
low power
low cost
power consumption
neural network
circuit design
primal dual
link structure
power supply
frequency response
analog vlsi
vlsi circuits