Low power logic for statistical inference.
Benjamin VigodaDavid ReynoldsJeffrey BernsteinTheophane WeberBill BradleyPublished in: ISLPED (2010)
Keyphrases
- low power
- statistical inference
- logic circuits
- power consumption
- low cost
- high speed
- model selection
- delay insensitive
- graphical models
- statistical learning
- bayesian inference
- high power
- single chip
- machine learning
- wireless transmission
- contingency tables
- low power consumption
- vlsi architecture
- digital signal processing
- gate array
- vlsi circuits
- image sensor
- decision trees
- signal processor
- cmos technology
- mixed signal
- real time