Model Checking Verilog Descriptions of Cell Libraries.
Matthias RaffelsieperJan-Willem RoordaMohammad Reza MousaviPublished in: ACSD (2009)
Keyphrases
- model checking
- temporal logic
- finite state
- formal verification
- model checker
- automated verification
- epistemic logic
- temporal properties
- computation tree logic
- symbolic model checking
- formal specification
- formal methods
- timed automata
- transition systems
- reachability analysis
- bounded model checking
- verification method
- finite state machines
- linear temporal logic
- partial order reduction
- pspace complete
- process algebra
- reactive systems
- web services
- concurrent systems
- satisfiability problem