High-speed architecture for a programmable frequency divider and a dual-modulus prescaler.
Patrik LarssonPublished in: IEEE J. Solid State Circuits (1996)
Keyphrases
- high speed
- real time
- low cost
- management system
- low power
- software architecture
- blind equalization algorithm
- high speed networks
- multi agent
- database systems
- general purpose
- access control
- conceptual model
- correlation coefficient
- objective function
- hardware implementation
- reference model
- design considerations
- single chip
- multiscale