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Cache-Aware Virtual Machine Scheduling on Multi-Core Architecture.

Cheol-Ho HongYoung-Pil KimSee-hwan YooChi-Young LeeChuck Yoo
Published in: IEICE Trans. Inf. Syst. (2012)
Keyphrases
  • multi core architecture
  • energy efficient
  • digital signal processor
  • query processing
  • main memory
  • data access
  • prefetching
  • multi core processors
  • data structure
  • energy efficiency
  • random access