A high-speed asynchronous array multiplier based on multi-threshold semi-static NULL convention logic pipeline.
Yanfei YangYintang YangZhangming ZhuDuan ZhouPublished in: ASICON (2011)
Keyphrases
- high speed
- asynchronous circuits
- shift register
- delay insensitive
- focal plane
- low power
- classical logic
- automated reasoning
- logic programming
- hardware implementation
- modal logic
- data sets
- real time
- predicate logic
- search algorithm
- high speed networks
- asynchronous communication
- programmable logic
- proof theory
- genetic algorithm
- random access memory