Design Strategies and Modified Descriptions to Optimize Cipher FPGA Implementations: Fast and Compact Results for DES and Triple-DES.
Gaël RouvroyFrançois-Xavier StandaertJean-Jacques QuisquaterJean-Didier LegatPublished in: FPL (2003)
Keyphrases
- case study
- hardware architectures
- hardware architecture
- knowledge based systems
- single chip
- hardware design
- hardware implementation
- efficient implementation
- software implementation
- embedded systems
- design process
- data sets
- engineering design
- field programmable gate array
- building blocks
- high speed
- high level
- image processing
- information systems