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A 40GS/s low-power BiCMOS comparator for ultra-high speed ADC.
He WenWei
Meng Qiao
Published in:
CSNDSP (2014)
Keyphrases
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high speed
low power
mixed signal
analog to digital converter
single chip
vlsi circuits
high power
low power consumption
vlsi architecture
wireless transmission
real time
digital signal processing
wide dynamic range
power reduction
signal processor
cmos technology
delay insensitive
image processing