Implementation of low power adder design and analysis based on power reduction technique.
Taikyeong T. JeongPublished in: Microelectron. J. (2008)
Keyphrases
- low power
- power reduction
- power dissipation
- power consumption
- logic circuits
- vlsi architecture
- cmos technology
- single chip
- low cost
- high speed
- low power consumption
- power saving
- digital signal processing
- ultra low power
- gate array
- energy efficiency
- mixed signal
- object oriented
- signal processor
- comprehensive analysis
- design methodology
- vlsi implementation
- nm technology