Optically-Clocked Instruction Set Extensions for High Efficiency Embedded Processors.
Claudio FaviTheo KluterChristian MesterEdoardo CharbonPublished in: IEEE Trans. Circuits Syst. I Regul. Pap. (2012)
Keyphrases
- high efficiency
- instruction set
- embedded processors
- instruction set architecture
- single chip
- low power
- floating point
- application specific
- high accuracy
- computer architecture
- parallel implementation
- embedded systems
- low cost
- power consumption
- memory space
- hardware and software
- level parallelism
- ibm power processor
- efficient implementation
- real time
- image quality
- memory access
- general purpose
- image processing