Low power multi-chains encoding scheme for SoC in low-cost environment.
Po-Han WuJiann-Chyi RauPublished in: ITC (2009)
Keyphrases
- low power
- low cost
- encoding scheme
- high speed
- power consumption
- real time
- single chip
- high power
- encoding schemes
- hardware and software
- low power consumption
- wireless transmission
- digital signal processing
- digital camera
- logic circuits
- genetic algorithm
- gate array
- vlsi architecture
- cmos technology
- mixed signal
- vlsi circuits
- neural network