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A programmable memory controller for the DDRx interfacing standards.
Mahdi Nazm Bojnordi
Engin Ipek
Published in:
ACM Trans. Comput. Syst. (2013)
Keyphrases
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digital signal processors
real time
control system
low cost
memory requirements
general purpose
optimal control
widely accepted
computing power
memory usage
web services
closed loop
control architecture
memory size
dynamic programming
memory space
iso iec
controller design
robust stability
genetic algorithm