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Design of Low Phase Noise VCO Considering C/L Ratio of LC Resonator in 0.18-μm CMOS Technology.
Nusrat Jahan
Adel Barakat
Ramesh K. Pokharel
Published in:
IEEE Trans. Circuits Syst. II Express Briefs (2021)
Keyphrases
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cmos technology
low power
design process
design considerations
low cost
power dissipation
spl times
optical flow
digital images
computer systems
power consumption