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Low power adaptive pipeline based on instruction isolation.
Seung Eun Lee
Chris Wilkerson
Ming Zhang
Rajendra S. Yavatkar
Shih-Lien Lu
Nader Bagherzadeh
Published in:
ISQED (2009)
Keyphrases
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low power
power consumption
low cost
high speed
single chip
low power consumption
wireless transmission
digital signal processing
cmos technology
logic circuits
high power
vlsi architecture
vlsi circuits
real time
power reduction
hardware and software