A 102.1-dB SNDR oversampling merge-mismatch-error-shaping SAR ADC in 180 nm CMOS.
Jinghong XiaoJiajun SongYuhua LiangPublished in: Microelectron. J. (2024)
Keyphrases
- cmos technology
- analog to digital converter
- error rate
- synthetic aperture radar
- high speed
- low power
- single chip
- low cost
- power consumption
- sar images
- circuit design
- delay insensitive
- sar imagery
- database
- multiresolution
- metal oxide semiconductor
- silicon on insulator
- error analysis
- sea ice
- solid state
- parameter estimation
- real time