A 576-Mbit/s 64-QAM 4 × 4 MIMO Precoding Processor With Lattice Reduction.
Chun-Fu LiaoFang-Chun LanJin-Wei JhangYuan-Hao HuangPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2014)
Keyphrases
- fading channels
- mimo systems
- high speed
- channel estimation
- physical layer
- ofdm system
- wireless communication systems
- multiple input multiple output
- communication systems
- low complexity
- bit error rate
- neural network
- lattice structure
- cdma systems
- concept lattice
- multipath
- multi input multi output
- mimo ofdm
- amplitude modulation
- instruction set
- wireless channels
- parallel algorithm