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A 250mV 7.5μW 61dB SNDR CMOS SC ΔΣ modulator using a near-threshold-voltage-biased CMOS inverter technique.
Fridolin Michel
Michiel Steyaert
Published in:
ISSCC (2011)
Keyphrases
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power supply
low voltage
analog vlsi
high speed
power consumption
low cost
low power
circuit design
single phase
vlsi circuits
design considerations
image sensor
real time
reactive power
power system
delay insensitive
pulse width modulation
random access memory
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