bytecodes to hardware through high-level synthesis.
João M. P. CardosoHorácio C. NetoPublished in: ICECS (1998)
Keyphrases
- high level synthesis
- parallel architecture
- hardware implementation
- low cost
- hardware and software
- real time
- computer systems
- parallel processing
- embedded systems
- image processing
- computing systems
- massively parallel
- search algorithm
- signal processing
- pattern recognition
- shared memory
- field programmable gate array
- hardware architecture