Generating Modulo-2 Linear Invariants for Hardware Model Checking.
Gadi AleksandrowiczAlexander IvriiOded MargalitDan RasinPublished in: Haifa Verification Conference (2014)
Keyphrases
- model checking
- temporal logic
- temporal properties
- formal specification
- model checker
- finite state
- formal verification
- partial order reduction
- symbolic model checking
- verification method
- finite state machines
- computation tree logic
- bounded model checking
- automated verification
- transition systems
- reachability analysis
- epistemic logic
- pspace complete
- timed automata
- concurrent systems
- process algebra
- deterministic finite automaton
- embedded systems
- formal methods
- theorem proving