A Phase-Based Approach for On-Chip Bus Architecture Optimization.

Jaesung Lee Hyuk-Jae Lee Chanho Lee

Published in: Comput. J. (2009)

Keyphrases

high speed
optimization problems
analog vlsi
vlsi implementation
management system
real time
global optimization
low cost
optimization algorithm
software architecture
memory subsystem
optimization method
single chip
physical design
instruction set
optimization process
parallel processing
host computer