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A 32Gb/s 2.9pJ/b Transceiver for Sequence-Coded PAM-4 Signalling with 4-to-6dB SNR Gain in 28nm FDSOI CMOS.

AurangozebCarson R. DickMaruf MohammadMasum Hossain
Published in: ISSCC (2019)
Keyphrases
  • high speed
  • signal to noise ratio
  • noise reduction
  • power supply
  • low cost
  • cmos technology
  • ultra low power
  • power consumption
  • frequency response
  • silicon on insulator
  • low power
  • circuit design
  • analog vlsi