Login / Signup

Power loop busbars design and experimental validation of 1 kV, 5 kA Solid State Circuit Breaker using parallel connected RB-IGCTs.

Rostan RodriguesUtkarsh RahejaYuzhi ZhangPietro CairoliAntonello Antoniazzi
Published in: IAS (2020)
Keyphrases
  • solid state
  • circuit design
  • power dissipation
  • high speed
  • power consumption
  • flash memory
  • cmos technology
  • chip design