Power and area efficient clock stretching and critical path reshaping for error resilience.

Mini Jayakrishnan Alan Chang Tae-Hyoung Kim

Published in: VLSI-SoC (2016)

Keyphrases

critical path
error resilience
power consumption
job shop scheduling problem
ibm power processor
packet loss
error propagation
video coding
computer vision
high speed
coding scheme
video quality
error concealment
video transmission