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A Weak Asynchronous RESet (ARES) PUF Using Start-up Characteristics of Null Conventional Logic Gates.

Sreeja ChowdhuryRabin Yu AcharyaWilliam BoullionAndrew FelderMark HowardJia DiDomenic Forte
Published in: ITC (2020)
Keyphrases
  • asynchronous circuits
  • logic circuits
  • logic programming
  • electronic devices
  • delay insensitive
  • real time
  • data sets
  • information retrieval
  • social networks
  • e learning
  • automated reasoning
  • shift register