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Integration of Current-Reused VCO and Frequency Tripler for 24-GHz Low-Power Phase-Locked Loop Applications.
Pei-Kang Tsai
Tzuen-Hsi Huang
Published in:
IEEE Trans. Circuits Syst. II Express Briefs (2012)
Keyphrases
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low power
high speed
power consumption
phase locked loop
low cost
single chip
wireless transmission
real time
digital signal processing
logic circuits
vlsi architecture
power reduction
mixed signal
power saving
high power
end to end
image compression
clock frequency
high voltage
vlsi circuits
signal processor