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Variability Aware Low-Power Delay Optimal Buffer Insertion for Global Interconnects.
Ashok Narasimhan
Ramalingam Sridhar
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2010)
Keyphrases
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low power
power dissipation
power consumption
high speed
low cost
cmos technology
single chip
high power
low power consumption
vlsi circuits
logic circuits
wireless transmission
digital signal processing
vlsi architecture
image sensor
gate array
real time
nm technology
ultra low power