Compact FPGA Implementations of the Five SHA-3 Finalists.
Stéphanie KerckhofFrançois DurvauxNicolas Veyrat-CharvillonFrancesco RegazzoniGuerric Meurice de DormaleFrançois-Xavier StandaertPublished in: CARDIS (2011)
Keyphrases
- software implementation
- hardware architectures
- hardware implementation
- high speed
- efficient implementation
- hash functions
- field programmable gate array
- real time image processing
- low cost
- fpga implementation
- real time
- hardware design
- verilog hdl
- general purpose processors
- systolic array
- parallel hardware
- low power consumption
- signal processing
- artificial intelligence