Characterizing Latency Overheads in the Deployment of FPGA Accelerators.
Ryan A. CookeSuhaib A. FahmyPublished in: FPL (2020)
Keyphrases
- field programmable gate array
- single chip
- response time
- hardware implementation
- clock frequency
- embedded systems
- software implementation
- parallel computing
- computing systems
- image processing algorithms
- high speed
- hardware design
- low cost
- low power
- hardware architecture
- prefetching
- power consumption
- signal processing
- xilinx virtex
- fpga technology
- verilog hdl
- orders of magnitude
- low power consumption
- data processing
- general purpose
- neural network
- real time